Accelerating SAR Image Formation and Processing
UDRI’s Scalable Computing researchers work in Synthetic Aperture Radar (SAR) processing acceleration, which leverages the latest available advanced computing hardware and languages to accelerate SAR image formation and processing.
We also conduct research on Arrays at Commercial Timescale (ACT). This involves developing interface logic on Field Programmable Gate Array (FPGA) devices (Ethernet, other controllers) to allow the Air Force Research Laboratory (AFRL) to conduct thorough testing on digital radiofrequency (RF) modules.
In addition, our Scalable Computing researchers conduct high-performance language development. We test hardware development languages based on C/C++, OpenCL, and MATLAB to implement a wide variety of signal processing algorithms in field programmable gate arrays (FPGAs) and graphics processing units (GPUs), two types of common high-performance hardware.